This article is part of our High-Frequency PCB Fabrication Guide.
In high-frequency PCB fabrication, uncontrolled via stubs are a common root cause of unexpected insertion loss and return loss degradation.
Designs simulate cleanly. Prototypes pass continuity testing. But once operating frequency exceeds 10 GHz, residual via stubs begin to behave as resonant transmission line segments. The result is degraded return loss, insertion loss spikes, and inconsistent performance between prototype and production panels.
This guide explains how back-drilled PCB via design affects signal integrity in high-speed and RF systems, and how to align via structures with real fabrication tolerances.
Why Via Stubs Matter in High-Frequency PCB Fabrication
A through-hole via that extends beyond the signal layer creates a stub. That unused barrel section behaves as a transmission line segment.
When stub length approaches one-quarter wavelength, it resonates.
Quarter-wave resonance frequency can be approximated as:
f approximately equals c / (4 × L × square root of Er)
- • L = stub length
- • Er = dielectric constant
- • c = speed of light
Typical Stub Resonance in FR-4
Below resonance: The stub appears capacitive and lowers impedance.
At resonance: Insertion loss increases sharply.
Above resonance: Behavior becomes inductive and unstable.
In high-speed PCB fabrication above 10 GHz, even a 15 to 20 mil residual stub can shift insertion loss by several dB.
Production Failure Pattern in High-Speed PCB Manufacturing
In production environments, designs operating around 12 GHz often carry 25 to 30 mil residual stubs. These boards pass electrical continuity testing but fail insertion loss validation by 2 to 3 dB compared to simulation.
The root cause is not simulation error. It is residual stub length exceeding the modeled assumption.
Most field solvers assume ideal via transitions. Manufacturing introduces tolerance variation.
Back-Drilling in Controlled Impedance PCB Fabrication
Back-drilling removes unused via barrel below the signal layer.
The design goal is to reduce residual stub length to less than 8 to 10 mil for systems operating above 15 GHz.
Important:
Back-drilling depth is not exact.
- • Back-drill depth tolerance typically plus or minus 3 to 5 mil
- • Layer-to-layer registration tolerance typically plus or minus 2 to 3 mil
A designed 8 mil residual stub may vary between 5 and 13 mil across the panel.
This variation shifts resonant frequency by 1 to 2 GHz.
Blind and Buried Vias Versus Back-Drilling
Blind vias eliminate stub length because they terminate at the target layer.
Advantages
- ✓ Reduced via inductance
- ✓ Lower insertion loss
- ✓ No residual resonance
Trade-Offs
- • Higher fabrication cost
- • Additional lamination cycles
- • Registration complexity
For high-speed PCB manufacturing above 25 GHz, blind vias often provide more consistent electrical performance than back-drilling.
Via Inductance and Insertion Loss Impact
Via inductance scales with length.
- • Approximate inductance ranges from 30 to 50 pH per mil of via length
- • On a 62 mil board, through-hole via inductance can reach 1.5 to 3 nH
- • At 10 GHz, each via transition may contribute 0.5 to 0.8 dB insertion loss depending on geometry
Differential Via Symmetry and Mode Conversion
In differential pair impedance control, asymmetrical via placement introduces mode conversion.
If one via path is 5 to 10 mil longer than the other:
- • Odd-mode impedance shifts
- • Even-mode impedance shifts
- • Sdc21 and Scd21 increase
- • Common-mode noise rises
For critical high-speed differential paths, via symmetry tolerance should remain within plus or minus 5 mil.
Anti-Pad Design and Return Path Integrity
Via anti-pad diameter directly affects capacitance and impedance.
Smaller anti-pad increases capacitance and lowers impedance
Larger anti-pad reduces capacitance but can disrupt return current continuity
For RF PCB fabrication, anti-pad diameter should be validated using controlled impedance stack-up modeling.
When Back-Drilling Is Required
- • Operating frequency exceeds 10 GHz
- • Differential data rate exceeds 25 Gbps
- • Residual stub length exceeds 15 mil
- • Insertion loss margin is under 2 dB
- • Return loss specification below -20 dB is required
Fabrication Validation Checklist
Prototype Versus Production Gap
Prototype runs often use smaller panels and tighter process oversight.
Production introduces lamination variation, drill wander accumulation, and lot-to-lot variability.
If via design margin is thin, production drift exposes it.
Design for Predictable Production Success
Via stubs are measurable, predictable, and preventable.
Above 10 GHz, back-drilling or blind via structures should be evaluated as part of a controlled impedance PCB fabrication strategy.
When via design aligns with real fabrication tolerances, first-pass production success becomes predictable.
Validate Via Structure Before Fabrication
If your design operates above 10 GHz or exceeds 25 Gbps differential rates, validate via structure before committing to fabrication.