This article is part of our High-Frequency PCB Fabrication Guide.
In high-frequency PCB fabrication, S-parameter and TDR (Time-Domain Reflectometry) measurements validate whether a design meets insertion loss, return loss, and impedance targets.
A board that passes visual inspection and continuity testing can still fail signal integrity validation if impedance discontinuities, via stubs, or material variation degrade transmission performance.
Validating fabricated boards against simulation before production release is the difference between predictable first-pass success and unpredictable yield loss.
What S-Parameters Measure in High-Frequency PCB Validation
S-parameters (scattering parameters) describe how RF energy propagates through a network. For PCB validation, the most critical parameters are:
S21 (Insertion Loss):
Measures signal attenuation from input to output. Acceptable loss depends on link budget. For 10G Ethernet on FR-4, target less than 3 dB at 5 GHz. For 100G on low-loss laminate, target less than 6 dB at 25 GHz.
S11 (Return Loss):
Measures signal reflection at the input. Poor return loss indicates impedance mismatch. For controlled impedance designs, target S11 below -15 dB across operating bandwidth. PCIe Gen 5 and 100G Ethernet require S11 below -20 dB.
S22 (Output Return Loss):
Measures reflection at the output. Should track closely with S11 for symmetric transmission lines.
S-parameter measurements are frequency-domain representations. They show how the PCB behaves across the entire operating band, not just at a single test frequency.
S-Parameter Target Values by Interface
Different high-speed interfaces have different S-parameter budgets. Meeting these targets requires both controlled impedance PCB fabrication and validated material properties.
These are typical targets. Actual specification limits depend on trace length, connector count, and total channel loss budget. Always validate against the specific standard (PCI-SIG, IEEE, USB-IF) for compliance testing.
TDR Measurements and Impedance Discontinuity Detection
TDR (Time-Domain Reflectometry) sends a fast-edge pulse and measures reflections. Each impedance discontinuity creates a reflection signature.
TDR reveals the location and magnitude of impedance errors that S-parameters detect but do not localize.
S-Parameters vs. TDR: When to Use Each
S-Parameters
Use when:
- • Validating against specification limits
- • Comparing to simulation models
- • Full-band frequency response needed
Limitations:
Does not localize errors spatially
TDR
Use when:
- • Locating impedance discontinuities
- • Debugging fabrication errors
- • Verifying controlled impedance zones
Limitations:
Limited frequency resolution
Common TDR Signatures and Root Causes
TDR analysis on first-article boards identifies whether impedance errors are systematic (fabrication process) or isolated (material defect, registration error).
Test Fixture Design and De-Embedding
Raw S-parameter measurements include connector parasitics, cable loss, and test fixture effects. These must be removed (de-embedded) to measure the actual PCB performance.
Without proper de-embedding, a 50-ohm board may measure as 45 or 55 ohms due to fixture loading.
Calibration Methods:
SOLT (Short-Open-Load-Thru)
- • Standard VNA calibration
- • Removes cable and connector effects
- • Good for coaxial setups
- • Does not remove fixture effects
TRL (Thru-Reflect-Line)
- • Requires custom calibration substrates
- • De-embeds fixture and launch
- • Best accuracy for on-wafer and PCB
- • Higher setup complexity
For production validation, SOLT is sufficient if test fixtures are repeatable. For design validation and compliance testing, TRL provides tighter correlation to simulation.
Differential S-Parameters and Mode Conversion
Differential signaling requires four-port S-parameter measurement to capture mode conversion between differential and common modes.
Key Differential Parameters:
Sdd21 (Differential Insertion Loss):
Measures differential signal transmission. Target values same as single-ended S21.
Sdd11 (Differential Return Loss):
Measures differential impedance matching. Should be below -15 dB for most interfaces, below -20 dB for PCIe Gen 5.
Sdc21 and Scd21 (Mode Conversion):
Measures conversion from differential to common mode (and vice versa). Poor values indicate via asymmetry, trace imbalance, or placement offset. Target below -30 dB for high-speed differential interfaces.
Mode conversion above -30 dB typically indicates a physical asymmetry that requires layout correction, not just tuning.
Common S-Parameter Failures and Root Causes
S21 degrades above 10 GHz but simulation shows flat response
Root cause: Material Df (dissipation factor) in fabrication differs from simulation model.
Fix: Request material characterization from fabricator. Update simulation with measured Dk and Df at operating frequency. For Rogers vs FR-4 comparisons, verify actual material grade used in production.
S11 shows periodic ripple across frequency
Root cause: Via stub resonance. Periodicity indicates stub length.
Fix: Verify back-drill depth on cross-section. If stub is too long, re-design with blind vias or tighter back-drill tolerance. See back-drilled PCB via design guide.
Sdc21 worse than -20 dB (excessive mode conversion)
Root cause: Differential pair asymmetry - via offset, trace width mismatch, or component placement error.
Fix: TDR both traces of the differential pair. Identify location of asymmetry. Check cross-section for trace width variation or via placement. Tighten placement tolerance on next build.
Simulation-to-Measurement Delta Analysis
Comparing measured S-parameters to simulation identifies whether fabrication met design intent.
Acceptable Delta Targets:
Less than 0.5 dB
Excellent correlation. Fabrication matched simulation.
0.5 to 1 dB
Acceptable. Likely material or process variation.
Greater than 1 dB
Investigation required. Check TDR, cross-section, material datasheet.
If delta exceeds 1 dB, the simulation model does not represent the fabricated board. Root-cause before releasing to production.
First Article S-Parameter and TDR Validation
Production Monitoring and Process Control
First-article validation confirms the design. Ongoing production monitoring confirms the process remains in control.
For high-volume programs, sample 2 to 5 percent of production panels with S-parameter spot checks. If measured S21 drifts more than 0.5 dB from first article, investigate fabrication process drift.
Lot-to-lot variation in material Dk or copper plating thickness can shift insertion loss by 0.3 to 0.8 dB. Statistical process control on measured S-parameters catches this before it affects yield.
Validate Before Production Release
S-parameter and TDR measurements confirm whether a design survived fabrication with signal integrity intact.
For designs operating above 10 GHz or requiring compliance testing (PCIe, Ethernet, USB), first-article S-parameter validation is not optional.