What is PCB Stack-up?
The stack-up defines the number of layers, the distance between layers, and the materials used in the PCB fabrication.
The objective of the PCB stack-up design process is to select suitable materials, and layer them to achieve optimal signal performance and power integrity at the lowest PCB cost.
The performance of a circuit board assembly is significantly dependant on the design of the PCB stack-up.
Consideration factors in stack-up design:
- the number of layers needed
- the arrangement of layers
- layer material
- routing and vias
The PCB Stack-up Structure
The PCB stack-up is the foundation upon which all design components are built. Therefore, a poorly designed PCB stack-up with improperly selected materials can adversely affect the performance of the circuit assembly in the way of signal transmission, power delivery, manufacturability, and reliability.
A typical PCB stack-up is constructed from multiple alternating layers of core, prepreg, and copper foil materials heat-pressed and glued together.
The core material (a cured fiberglass-weave material with epoxy resin) is a thin electrical insulator (dielectric) with copper-clad foils bonded to both sides. So, the dielectric acts as an insulation layer between the copper foils. The internal copper form the signal, power, and ground planes (layers) in the PCB. Prepreg binds the core layers and operates as insulation between core layers.
During the PCB manufacturing process, the layer arrangement of core and prepreg layers are laminated together with a top and bottom copper layer. The PCB is formed using heat and pressure to bind all the different (PCB stacks) layers together.
The number of layers needed (layer count)
Among the several factors that need to be considered when determining the number of layers needed, the most pivotal are:
- power/ ground / signal layer requirements
- board complexity
- component density
- component package types
To obtain the best signal integrity of the channel for high channel count /high channel density devices, channel routing will probably need to be accommodated with blind vias in addition to layer arrangements.
In the layer stack up, the power plane is usually placed directly next to a ground layer to maintain signal performance and signal robustness. And, to minimize the total layer count the power plane is shared to the extent possible.
Spacing between adjacent signal layers should be increased. However, this can impact the overall thickness of the PCB when large separations are present.
For high-speed traces, the routing layer should be planned during stack-up design, where high-speed signals are routed on minimum thickness microstrips.
Place signal layers next to internal power layers for tight coupling.
Make the stack-up symmetric from the top and bottom layers inward.